Interesting tidbits regarding Apple-designed ‘A9’ chip said to power the upcoming ‘iPhone 6s’ and ‘iPhone 6s Plus’ handsets surfaced Monday, offering some previously unknown details regarding its performance and design.
It appears that the next iPhone and iPad’s processor could employ so-called system-in-package (SiP) design which squeezes some additional components into a tiny chip, including the baseband modem and the power management circuitry.
Moreover, a leaked benchmark purports to compare single and multi-thread performance of several unreleased mobile processors, such as NVIDIA’s Denver 2, Samsung’s Exynos M1, Huawei’s Kirin 950, LG’s NUCLUN 2 and Apple’s A9 and A9X.
An alleged iPhone 6s schematics suggests the A9 will adopt the SiP (System in Package) architecture. The Apple Watch is Apple’s first mobile product to incorporate SiP design which squeezes an entire computer architecture onto a single chip.
Due to limited space, the Apple Watch’s ‘S1’ chip ditches the traditional printed board circuit and bundles up the CPU and GPU, RAM, storage, additional support processors and sensors in a single package.
Now, assuming the leaked drawings seen above are accurate, the iPhone 6s’s A9 processor integrates the power management, the baseband chip and a couple other support chips, resulting in a simplified motherboard.
Smaller die size
In addition to tighter integration through the use of the SiP engineering process, the source of the leaked schematics says the A9 chip is fifteen percent smaller than the A8 processor inside the current iPhones.
This is almost certainly due to the chip being fabbed on TSMC and Samsung’s 14-nanometer process technology, as opposed to the 20-nanometer process used in the manufacture of the current-generation A8 chip.
The smaller the process technology, the tinier the transistors. And as transistors shrink, electrons travel shorter distance which allows for speed gains and better power efficiency.
The China Times first reported (Google Translate) in March that more than half of the internal hardware of the next iPhone will be bundled in a SiP module, with the A9 reportedly built using the “Integrated fan-out wafer-level packaging” (InFO-WLP) process.
A source recently posted on China’s Weibo network these purported GeekBench benchmark scores that seem to compare single (purple) and multi-thread (green) CPU scores of the following unreleased mobile chips: NVIDIA’s Denver 2, Samsung’s own Exynos M1, Apple’s A9 and A9X, Huawei’s Kirin 950 and LG’s NUCLUN 2.
The A9 and A9X chips for new iPhones and iPads, respectively, appear to be quite speedy. The A9 allegedly scored 2,090 points on a single-core CPU test and 3,569 points on a multi-core test. The A9X yielded 2,109 and 5,101 points, respectively.
That’s quite a performance jump versus the existing A8’s scores of 1,610 and 2,890 points and the A8X’s 1,808 and 4,526 single/multi-core scores. The source added that the A9 is capable of rendering 30.3 and 66 frames per second off-screen in GFXBench 3.0’s Manhattan and Tyrannosaurus tests, respectively (offscreen).
In comparison, NVIDIA’s Denver 2 hit 117/206.9 FPS in Manhattan/Tyrannosaurus tests, with Samsung’s 2.4GHz quad-core Exynos M1 supposedly scoring 59.4 and 108.9 FPS. Keep in mind that we cannot vouch for the veracity of the rumored benchmark as these numbers could be easily fabricated so take them with healthy skepticism.
Taiwan Semiconductor Manufacturing Company (TSMC), which along with Samsung was commissioned to build the new A9 chip according to Apple’s specification and design, announced the SiP process technology back in 2014.
Samsung, of course, has experience manufacturing SiPs as it’s currently building the Apple Watch’s S1 chip.
Not only would the SiP design allow for even thinner iPhones, but also more efficient power performance. Essentially, the SiP design has the potential to completely eliminate the printed circuit board in iPhones.
Source: G for Games 1, 2